AMD’s next generation of server processors, Genoa, is to appear with up to 96 instead of the previous 64 CPU cores. To do this, in the top models they use 12 instead of the previous 8 compute dies, each with eight cores.
This is evident from documents from the ransomware attack against Gigabyte. The manufacturer’s portfolio also includes server mainboards. Genoa relies on the improved Zen 4 CPU architecture including a manufacturing change from TSMC 7 nanometer technology to 5 nm.
AVX-512
Although transistors in the 5-nm process are around 45 percent smaller than with the previously used 7-nm technology, the compute chips should remain almost as large as those of the current Zen 3 generation with a good 72 mm². According to the leak, AMD is not increasing the number of CPU cores per die, but is broadening the pipelines, including by supporting AVX-512 instructions. Larger caches are also conceivable. So far, the same CPU chips have been used for server (Epyc) and desktop processors (Ryzen).
Block diagram of an SP5 system with two Genoa processors. Also included: 24 memory blocks, each with its own channel to the controller.
(Image: Gigabyte leak)
In the meantime, servers are being given a new I / O die, which, according to the overview, houses a DDR5 RAM controller for 12 instead of the previous 8 memory channels. For the combination of almost 397 mm² I / O dies and up to 12 compute chiplets, AMD requires larger chip carriers and a new CPU socket.
SP5 should provide 6096 contacts instead of the previous 4096. The CPU socket can withstand short-term power peaks in the millisecond range of up to 700 watts. Schematic drawings of a Genoa processor show that the carrier surface could be sufficient for other chip configurations in the future.
For desktop processors comes the CPU version AM5, which, unlike its predecessors, is to use a Land Grid Array (LGA). The contact pins are no longer on the underside of the CPU, but on the mainboard. Intel has relied on the principle for many generations.
(mmma)
