Logic chips: Open source FPGA with 12 nanometer technology

Published by: MRT

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Logic chips: Open source FPGA with 12 nanometer technology

The “Laboratory for Nano Integrated Systems” at the University of Utah (UofU LNIS) had an open FPGA with 12-nanometer technology produced by the chip contract manufacturer Globalfoundries. In order to program the “First Reconfigurable Open-source Gate-array” (FROG), you don’t need any proprietary software like with FPGA chips from AMD / Xilinx and Intel / Altera. Rather, the LNIS lays down the necessary tools at GitHub open.

Although some FPGA families from Lattice and Xilinx can also be programmed with free toolchains and EDA tools such as Yosys and ArachnePNR, much of the information required for this comes from reverse engineering projects such as IceStorm, Trellis and X-Ray.

The design of the OpenFPGA is disclosed and documentedbecause it was generated with the automatic “IP generator” of the same name. It generates the configurable “Intellectual Property Blocks” (IP Blocks) of the FPGA, which have a somewhat skewed designation here because IP usually means protected and not freely usable intellectual property.

The US Department of Energy (DoE) is contributing DARPA funding to the development of OpenFPGA. FPGAs are designed to help secure the US’s digital sovereignty over armaments and critical infrastructure. Globalfoundries therefore also manufactures FROG under the conditions of the Department of Defense Trusted Foundry Program.

In Germany, the Federal Ministry of Education and Research (BMBF) supports the program “Trustworthy electronics (ZEUS)“Several projects including VE-HEP for the design of open source processors.

There are also FPGAs developed in Germany like that Cologne Chip GateMate-FPGA, which Globalfoundries produces with 28 nanometer technology. However, this is not about open source hardware.

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